# 16V8 for I/O number one

Device 16V8 #In registered mode

input
    SYNC:1,         # Sync from CPU
    MERPI:2,        # Memory-read while processing interrupt
                    # 3 and 4 not used
    IOW.L:5,        # IO write from CPU
    A12:6,          # Address lines from CPU
    A11:7,
    A10:8,
    A9:9,

output
    #OmniportEnable.L:12,    # Enables the omniport bidirectional driver
    #OmniportToCpu:13,       # True from omniport -> CPU, False for CPU -> Omniport
    MEMM.L:15,              # Write pulse to memory-mode latch
    DOS.L:16,               # Data Out Strobe - Write omniport data
    COS.L:17,               # Command Out Strobe - Write omniport data
    AOS.L:18,               # Address Out Strobe - Write omniport address
    BANK.L:19,              # Write bank select latch
    
#register
#    OmniportClock.L:14,     # CLK.L signal for omniport

temp
    adr_0, adr_1, adr_2, adr_3, adr_4,
    t_aos, t_cos, t_dos
    
implementation

adr_0 equ !A11 & !A10 & !A9
adr_1 equ !A11 & !A10 &  A9
adr_2 equ !A11 &  A10 & !A9
adr_3 equ !A11 &  A10 &  A9
adr_4 equ  A11 & !A10 & !A9

t_aos equ IOW & adr_1
t_cos equ IOW & adr_2
t_dos equ IOW & adr_3

BANK equ IOW & adr_0
AOS  equ t_aos
COS  equ t_cos
DOS  equ t_dos
MEMM equ (IOW & adr_4) | MERPI

#OmniportToCpu  equ t_gsi | t_gdi
#OmniportEnable equ t_aos | t_cos | t_dos | t_gsi | t_gdi
#OmniportClock  equ OmniportClock